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EdgeFirst/yolov8-seg

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Model Card

YOLOv8 Segmentation — EdgeFirst Model Zoo

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![EdgeFirst Model Zoo](https://huggingface.co/spaces/EdgeFirst/Models)

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YOLOv8 Segmentation models trained on COCO 2017 (80 classes) and validated on real edge hardware with the EdgeFirst Profiler, which runs the pipeline and computes the accuracy on the device itself. Each row in the tables below cites the EdgeFirst Studio validation session (v-XXXX) that produced the measurement.

Part of the EdgeFirst Model Zoo. New here? [Introducing the EdgeFirst Model Zoo](https://huggingface.co/blog/EdgeFirst/model-zoo-intro) covers what is in the zoo, why every figure links to its validation session, and how to reproduce any of it on your own hardware. Want a platform, model or task we don't cover yet? Vote on what we measure next.

[!TIP] Training experiment: View on EdgeFirst Studio — dataset, training configuration, metrics, and exported artifacts.
[!NOTE] Anchor-free DFL detection head. Detection and instance-segmentation variants.

Reference accuracy — ONNX FP32

Accuracy ceiling for each size, measured against COCO val2017 (5,000 images) with pycocotools. Quantized and compiled artifacts (TFLite INT8, HEF, etc.) are graded against this reference per the EdgeFirst publication rule.

SizeParamsGFLOPsBox mAP@0.5Box mAP@0.5-0.95Mask mAP@0.5Mask mAP@0.5-0.95Source
Nano3.2M8.951.13%36.02%48.09%29.14%v-e87
Small11.2M28.860.02%43.87%56.46%34.83%v-e91
Medium25.9M79.365.08%48.76%61.52%38.14%v-e8f
Large43.7M165.7—————
XLarge68.2M258.5—————
Sizes. The EdgeFirst Model Zoo currently validates Nano, Small, and Medium. The Large and XLarge variants are not evaluated at this time — their parameter and GFLOP counts are listed above for reference, with accuracy shown as —.

Accuracy methodology & relation to Ultralytics

Every model in this zoo uses the official Ultralytics pretrained weights, byte-for-byte — there is no re-training. These are the same models Ultralytics ships, measured on the deployment-realistic path: a fixed-input ONNX graph (square letterbox, rect=False), the standard COCO AP@[maxDets=100] convention, and COCO crowd regions scored as normal detections. Ultralytics' headline COCO numbers use their internal validator (rectangular inference, crowd-ignored, maxDets=300), so a small, fully-explained offset on identical weights is expected — not an accuracy deficit.

The same relationship holds through the shared detection head — see any EdgeFirst detection card for the full three-way reconciliation table. The Mask mAP above is stock pycocotools segmentation AP on identical Ultralytics weights and tracks Ultralytics' official mask figures within a comparable ~1–2 pp deployment-methodology offset.


On-target validation results

Each row is one EdgeFirst Studio validation session. Click the Source link to inspect the full session — model artifact, dataset version, parameters, per-stage Perfetto trace, and the host hardware description (hostname, kernel version, SoC, NPU, profiler version).

Row conventions in the table below:

  • —Rows whose `Δ` cell reads `ref` are the float reference runs each quantized/compiled measurement is graded against.
  • —Rows without a number under the metric columns are validation sessions currently in progress, or a session not yet linked to its ONNX FP32 reference. The Studio Source link tracks the current status.
  • —Rows whose `Δ vs FP32` cell carries a ⚠ are below our accuracy expectations for that platform (more than 10 percentage points under the float reference). The numbers are real measurements on real hardware, reproducible from the linked Studio session, and we publish them as-is; we are investigating the results to make improvements, and the next snapshot of this card will reflect any recovered accuracy.
  • —Precision varies by target: the ONNX reference rows are FP32; macOS CoreML and NVIDIA Jetson TensorRT run FP16; the NXP i.MX 8M Plus, NXP i.MX 95 Neutron, and Hailo NPUs run INT8. The NXP Ara240 DNPU runs a mixed INT8/INT16 scheme — most of the model is INT8, with the box-regression path (and the ops feeding it) promoted to INT16 to improve localization accuracy.
  • —Decoder variants. EdgeFirst ships three INT8 split-decoders — smart, logical, and combined (described under Decode below). Every one we have measured is listed; none is headlined over another, because which one wins is a property of the target, not of the variant. Full converter documentation: EdgeFirst model conversion — these are the converters used by this Model Zoo and the EdgeFirst Performance Index report.
  • —Runtime. Which inference stack executed the model. It is a column of its own because one accelerator can be reached by more than one: on Qualcomm Hexagon HTP, ONNX · QNN EP is an ONNX Runtime EPContext binary while LiteRT is the LiteRT + QNN delegate path, and the two produce measurably different pipelines from the same weights on the same silicon. Compare rows that share a size, platform, precision, and decode to read that difference directly.
  • —Decode. What the exported graph emits, and therefore what your application has to do with it. Logical keeps the head's outputs separate and named — boxes, scores, and for segmentation the mask prototypes and coefficients — so reading them needs no decoder beyond taking the tensors as they come. Smart cuts the graph further upstream, at a point chosen by dynamic range and sliceability: the operations that quantize worst are lifted out of the model and run outside it, which is what recovers the accuracy, and which is why it needs a decoder implementing that cut (in EdgeFirst deployments, the HAL provides it). Combined fuses the decode into the quantized graph — the standard upstream export. It is the least accurate of the three by construction, and the EdgeFirst converters do not emit it for quantized targets; rows appear only where one was measured. Compare rows sharing a size and platform to see what the cut buys on your target — on detection it is often small, on quantized segmentation masks it is usually decisive. A — means the run carries no quantized decode split at all (float ONNX / TensorRT / CoreML).
  • —Rows are not ranked. Where a size and platform appear more than once, the rows are competing configurations — a different runtime, precision, decode variant, pipeline mode, or board — not duplicates. Only genuinely repeated measurements of the same configuration are collapsed, newest first.
  • —Platform-label suffixes. (FRDM) / (Phytec) name the NXP i.MX 95 development board a session ran on. — latency / — throughput mark the two pipeline configurations the NXP i.MX 95 Neutron and NXP Ara240 targets run: the latency pipeline runs inference serially for the lowest per-frame latency; the throughput pipeline runs multiple inference workers for the highest FPS, which raises per-call inference time in exchange. Rows with neither suffix run a single pipeline.
  • —End-to-end (ms) is the sequential per-image latency of the compute pipeline — preprocess → inference → postprocess. Image acquisition (camera or file load + JPEG decode) overlaps these stages and is excluded from this figure.
  • —Realized FPS vs Core-throughput ceiling (FPS). Realized FPS is the measured steady-state throughput — the rate at which final results are actually delivered over the full validation pipeline. It normally exceeds 1000 / end-to-end because the runtime overlaps stages across frames, and it is the true, priority number. Core-throughput ceiling (FPS) (shown with a ~) is the accelerator's core ceiling — 1000 / device-compute-time, the rate the NPU/DNPU could sustain if it were the only bottleneck — so it is a possibly-achievable note, not a claim. It is read from the isolated device-compute stage, which (unlike the host capture/preprocess stages, whose measured time inflates when the pipeline is backpressured) is stable and load-independent. Whether a deployment approaches it depends on the surrounding pipeline, and two levers dominate: (1) host bottlenecks — these validation runs decode a JPEG per image, whereas a live camera pipeline skips that decode and can run closer to the ceiling; and (2) confidence threshold — validation runs at 0.001 to capture every detection for mAP, which makes NMS/decode heavy, while a deployment threshold of 0.25–0.75 produces far fewer candidate boxes and lighter postprocessing, raising realized FPS toward the ceiling.
SizePlatformRuntimeDecodeBox mAP@0.5Mask mAP@0.5-0.95Δ mask vs FP32 (pp)Inference (ms)End-to-end (ms)Realized FPSCore-throughput ceiling (FPS)Source
NanoONNX FP32 (AWS Graviton · 4-core)ONNX—51.13%29.15%+0.01387.44425.9410.0~3v-e5d
NanoONNX FP16 (AWS Graviton)ONNX—50.29%28.67%-0.47277.88360.676.9~7v-711
NanoONNX FP32 (AWS Graviton4 · 48-core)ONNX—51.13%29.16%+0.02109.43136.39110.6~9v-e8b
NanoONNX FP32 (AWS Graviton4 · 8-core)ONNX—51.13%29.16%+0.02329.09352.6423.4~3v-e72
NanoONNX FP16 (Intel Core i9-13900F · 32-core)ONNX—50.27%28.69%-0.45104.40207.5217.5~17v-6dc
NanoONNX FP32 (Intel Core i9-13900F · 32-core)ONNX—51.13%29.14%+0.0055.8483.9947.7~48v-a49
NanoONNX FP32 (Intel Xeon Platinum 8488C · 24-core)ONNX—51.13%29.14%+0.00102.37144.9498.4~10v-e90
NanoONNX FP32 (Intel Xeon Platinum 8488C · 4-core)ONNX—51.13%29.14%+0.00262.65316.1027.5~4v-e7c
NanoONNX FP32 (CUDA)ONNX—51.13%29.14%ref8.9139.49121.3~133v-e87
NanoONNX FP32 (CUDA)ONNX—51.11%29.14%+0.0010.8021.79242.1~242v-a8b
NanoONNX FP16 (CUDA)ONNX—51.11%29.15%+0.017.9620.15302.9~303v-aa0
NanoApple M2 Max — CoreML Neural Engine (FP16)ONNX—49.88%28.46%-0.682.7410.21422.9~424v-72c
NanoApple M2 Max — CoreML Metal GPU (FP16)ONNX—49.94%28.47%-0.676.6416.93307.1~307v-736
NanoApple M2 Max — CoreML CPU (FP16)ONNX—50.78%28.92%-0.2221.7429.9087.2~87v-9f4
NanoApple iPhone 17 Pro — CoreML Neural Engine (FP16)ONNX—50.71%28.92%-0.222.4023.29162.0~63v-f63
NanoApple iPhone 17 Pro — CoreML Metal GPU (FP16)ONNX—50.76%28.92%-0.228.8630.07135.3~64v-f62
NanoApple iPhone 17 Pro — CoreML CPU (FP16)ONNX—50.78%28.95%-0.1923.2350.0472.5~43v-f60
NanoApple iPhone 15 Pro — CoreML Neural Engine (FP16)ONNX—50.71%28.92%-0.222.5529.76122.8~49v-f0d
NanoApple iPhone 15 Pro — CoreML Metal GPU (FP16)ONNX—50.76%28.92%-0.2216.8152.2279.3~37v-f0b
NanoApple iPhone 15 Pro — CoreML CPU (FP16)ONNX—50.79%28.96%-0.1828.8468.7656.3~34v-eff
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPSmart48.59%27.45%-1.692.1440.2592.9~165v-109c
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPLogical37.92%18.50%-10.642.0613.32347.1~445v-109d
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPSmart50.24%28.60%-0.544.9952.1882.3~128v-109a
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPLogical49.37%10.81%-18.335.4129.82135.1~188v-109b
NanoSamsung Galaxy S26 Ultra — CPULiteRTSmart49.34%27.89%-1.2565.42130.2556.6~15v-fa9
NanoNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTCombined37.94%21.74%-7.4082.14123.2110.7~12v-8d5
NanoNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTLogical37.94%21.74%-7.4082.05123.2510.7~12v-8d6
NanoNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTSmart48.83%27.59%-1.5579.61199.4410.6~12v-8d7
NanoNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — latencyLiteRTLogical37.94%21.74%-7.4083.28135.6510.5~12v-c84
NanoNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughputLiteRTSmart48.83%27.59%-1.5579.26217.4010.4~12v-c83
NanoNXP i.MX 95 + eIQ Neutron NPU — latencyLiteRTSmart49.63%27.97%-1.1720.09117.9722.2~14v-e32
NanoNXP i.MX 95 + eIQ Neutron NPU — throughputLiteRTSmart49.62%27.97%-1.1724.58186.8723.6~24v-e33
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTSmart48.87%27.63%-1.5120.62116.4020.8~13v-8cf
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTLogical38.09%21.84%-7.3049.1473.6919.4~20v-8cc
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTCombined38.09%21.84%-7.3048.8273.2319.5~20v-8ca
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTLogical38.09%21.84%-7.3093.69139.7439.9~40v-8ce
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTCombined38.09%21.84%-7.3093.37139.1440.3~40v-8cb
NanoNXP i.MX 95 + eIQ Neutron NPU (Phytec) — throughputLiteRTSmart48.87%27.63%-1.5124.83166.2423.7~24v-8a8
NanoNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTSmart49.62%27.96%-1.1820.85123.5421.3~14v-e26
NanoNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTLogical38.58%22.11%-7.0347.5169.7920.0~20v-bcf
NanoNXP i.MX 95 + eIQ Neutron NPU (Verdin) — throughputLiteRTSmart49.63%27.97%-1.1725.98199.5022.6~23v-e0d
NanoNXP Ara240 (FRDM) — latencyAra DVMSmart47.22%26.62%-2.529.6342.9750.4~56v-a18
NanoNXP Ara240 (FRDM) — throughputAra DVMSmart47.22%26.62%-2.529.8062.6251.7~226v-a19
NanoRaspberry Pi 5 + Hailo-8L NPUHailo HEF—49.28%28.02%-1.1216.1838.2553.7~54v-8e5
NanoNVIDIA Jetson Orin Nano (TensorRT FP16)TensorRT—51.15%29.18%+0.046.2058.7575.9~60v-91d
SmallONNX FP32 (AWS Graviton · 4-core)ONNX—60.07%34.82%-0.011126.771155.093.5~1v-e5e
SmallONNX FP32 (AWS Graviton4 · 48-core)ONNX—60.07%34.82%-0.01298.30315.1042.7~3v-e92
SmallONNX FP32 (AWS Graviton4 · 8-core)ONNX—60.07%34.82%-0.01918.98933.588.6~1v-e8c
SmallONNX FP32 (Intel Core i9-13900F · 32-core)ONNX—60.03%34.83%+0.00141.45164.3619.8~20v-a50
SmallONNX FP32 (Intel Xeon Platinum 8488C · 24-core)ONNX—60.03%34.83%+0.00253.09289.7248.8~4v-e94
SmallONNX FP32 (Intel Xeon Platinum 8488C · 4-core)ONNX—60.03%34.83%+0.00611.12644.1212.8~2v-e7e
SmallONNX FP32 (CUDA)ONNX—60.02%34.83%ref14.3540.08137.3~148v-e91
SmallONNX FP32 (CUDA)ONNX—60.02%34.83%+0.0020.4231.47151.7~152v-a92
SmallONNX FP16 (CUDA)ONNX—60.03%34.83%+0.0013.3626.01222.5~222v-aa7
SmallApple M2 Max — CoreML Neural Engine (FP16)ONNX—59.62%34.65%-0.186.1813.83261.8~262v-9e9
SmallApple M2 Max — CoreML Metal GPU (FP16)ONNX—59.61%34.58%-0.2521.3429.86133.8~134v-9e8
SmallApple M2 Max — CoreML CPU (FP16)ONNX—59.57%34.54%-0.2941.2549.0447.0~47v-9e7
SmallApple iPhone 17 Pro — CoreML Neural Engine (FP16)ONNX—59.63%34.62%-0.2114.1232.36116.9~71v-f6d
SmallApple iPhone 17 Pro — CoreML Metal GPU (FP16)ONNX—59.61%34.58%-0.2531.0546.8460.7~32v-f6c
SmallApple iPhone 17 Pro — CoreML CPU (FP16)ONNX—59.56%34.55%-0.2872.0388.4527.2~14v-f6b
SmallApple iPhone 15 Pro — CoreML Neural Engine (FP16)ONNX—59.63%34.63%-0.2012.6544.68102.0~44v-f31
SmallApple iPhone 15 Pro — CoreML Metal GPU (FP16)ONNX—59.62%34.59%-0.2475.0688.3526.0~13v-f34
SmallApple iPhone 15 Pro — CoreML CPU (FP16)ONNX—59.57%34.55%-0.2882.33104.3623.7~12v-f02
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPSmart58.59%33.71%-1.122.6834.62117.2~191v-10a0
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPLogical45.32%21.43%-13.402.6014.51343.0~420v-10a1
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPSmart59.48%34.40%-0.435.7145.7093.6~142v-109e
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPLogical58.47%12.41%-22.426.2831.90144.6~187v-109f
SmallSamsung Galaxy S26 Ultra — CPULiteRTSmart58.89%34.06%-0.77170.21219.5431.9~6v-fe7
SmallNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTCombined45.39%26.94%-7.89149.32191.216.2~7v-96d
SmallNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTLogical45.39%26.94%-7.89149.34190.176.2~7v-970
SmallNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTSmart58.45%33.86%-0.97147.05226.426.3~7v-972
SmallNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — latencyLiteRTLogical45.39%26.94%-7.89151.70203.356.1~7v-c93
SmallNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughputLiteRTSmart58.45%33.86%-0.97146.93239.326.3~7v-c92
SmallNXP i.MX 95 + eIQ Neutron NPU — latencyLiteRTSmart59.07%34.06%-0.7749.66101.6919.2~19v-e36
SmallNXP i.MX 95 + eIQ Neutron NPU — throughputLiteRTSmart59.07%34.06%-0.77377.59436.6320.9~21v-e37
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTSmart58.42%33.76%-1.0751.16112.0918.3~19v-941
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTLogical45.37%26.80%-8.0387.78112.3711.0~11v-93e
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTCombined45.37%26.80%-8.0386.87111.0711.2~11v-93b
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTSmart58.42%33.76%-1.07194.35262.7919.8~20v-943
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTLogical45.37%26.80%-8.03190.56214.9320.7~21v-940
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTCombined45.37%26.80%-8.03190.30214.3920.7~21v-93d
SmallNXP i.MX 95 + eIQ Neutron NPU (Phytec) — throughputLiteRTSmart58.42%33.76%-1.07185.95245.6920.8~21v-8fd
SmallNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTSmart59.07%34.06%-0.7750.53105.7018.8~19v-e27
SmallNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTLogical45.84%27.17%-7.6677.6799.8412.5~13v-bdd
SmallNXP i.MX 95 + eIQ Neutron NPU (Verdin) — throughputLiteRTSmart59.07%34.06%-0.77388.03450.4820.3~20v-e14
SmallNXP Ara240 (FRDM) — latencyAra DVMSmart56.31%32.62%-2.2115.6442.2453.6~54v-a26
SmallNXP Ara240 (FRDM) — throughputAra DVMSmart56.32%32.63%-2.2016.1566.4764.7~94v-a27
SmallRaspberry Pi 5 + Hailo-8L NPUHailo HEF—58.40%33.68%-1.1542.2961.7222.7~23v-8ef
SmallNVIDIA Jetson Orin Nano (TensorRT FP16)TensorRT—60.05%34.84%+0.0114.0162.7386.6~68v-925
MediumONNX FP32 (AWS Graviton · 4-core)ONNX—65.07%38.13%-0.012806.492832.981.4~0v-e5f
MediumONNX FP32 (AWS Graviton4 · 48-core)ONNX—65.07%38.13%-0.01724.39740.8817.6~1v-e9e
MediumONNX FP32 (AWS Graviton4 · 8-core)ONNX—65.07%38.13%-0.012244.672256.583.6~0v-e76
MediumONNX FP32 (Intel Core i9-13900F · 32-core)ONNX—65.08%38.14%+0.00324.10345.488.9~9v-a57
MediumONNX FP32 (Intel Xeon Platinum 8488C · 24-core)ONNX—65.08%38.14%+0.00588.29623.2421.2~2v-e99
MediumONNX FP32 (Intel Xeon Platinum 8488C · 4-core)ONNX—65.08%38.14%+0.001421.891448.315.6~1v-e81
MediumONNX FP32 (CUDA)ONNX—65.08%38.14%ref29.4248.85112.7~113v-e8f
MediumONNX FP32 (CUDA)ONNX—65.08%38.15%+0.0155.0665.3062.1~62v-a99
MediumONNX FP16 (CUDA)ONNX—65.06%38.15%+0.0128.4741.89118.2~118v-aae
MediumApple M2 Max — CoreML Neural Engine (FP16)ONNX—63.08%37.10%-1.0417.1323.51111.3~111v-72e
MediumApple M2 Max — CoreML Metal GPU (FP16)ONNX—64.09%37.54%-0.6050.6458.5358.0~58v-9df
MediumApple M2 Max — CoreML CPU (FP16)ONNX—64.07%37.51%-0.6378.4986.8225.1~25v-9de
MediumApple iPhone 17 Pro — CoreML Neural Engine (FP16)ONNX—64.05%37.62%-0.5225.9636.3373.9~39v-f74
MediumApple iPhone 17 Pro — CoreML Metal GPU (FP16)ONNX—64.09%37.55%-0.5967.6077.8329.0~15v-f76
MediumApple iPhone 17 Pro — CoreML CPU (FP16)ONNX—64.06%37.51%-0.63163.92179.3412.1~6v-f75
MediumApple iPhone 15 Pro — CoreML Neural Engine (FP16)ONNX—64.05%37.62%-0.5232.9748.5557.9~30v-f43
MediumApple iPhone 15 Pro — CoreML Metal GPU (FP16)ONNX—64.10%37.53%-0.61181.18199.2010.8~6v-f4e
MediumApple iPhone 15 Pro — CoreML CPU (FP16)ONNX—64.06%37.53%-0.61181.67204.1410.9~6v-f05
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPSmart63.95%37.29%-0.855.9440.46109.8~174v-10a4
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPLogical47.02%24.48%-13.665.6518.87258.3~305v-10a5
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPSmart64.77%37.82%-0.329.8352.8680.8~114v-10a2
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPLogical63.71%13.22%-24.9214.0640.09108.8~125v-10a3
MediumSamsung Galaxy S26 Ultra — CPULiteRTSmart63.62%37.20%-0.94423.67467.0913.7~2v-101f
MediumNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTCombined46.05%27.68%-10.46272.63316.013.5~4v-9a6
MediumNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTLogical46.05%27.68%-10.46272.73313.043.5~4v-9a7
MediumNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTSmart62.77%36.63%-1.51267.65343.193.6~4v-9a8
MediumNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — latencyLiteRTLogical46.05%27.68%-10.46276.12327.363.5~4v-ca7
MediumNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughputLiteRTSmart62.77%36.63%-1.51270.51363.033.6~4v-ca6
MediumNXP i.MX 95 + eIQ Neutron NPU — latencyLiteRTSmart64.23%37.49%-0.65125.91186.367.8~8v-e43
MediumNXP i.MX 95 + eIQ Neutron NPU — throughputLiteRTSmart64.22%37.49%-0.65986.971045.738.1~8v-e44
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTSmart62.66%36.61%-1.53127.25177.987.6~8v-98f
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTLogical46.14%27.71%-10.43162.78185.836.0~6v-98c
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTCombined46.14%27.71%-10.43162.62185.526.0~6v-98a
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTSmart62.66%36.61%-1.53495.23548.828.0~8v-991
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTLogical46.14%27.71%-10.43490.67516.438.1~8v-98e
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTCombined46.14%27.71%-10.43490.30515.708.1~8v-98b
MediumNXP i.MX 95 + eIQ Neutron NPU (Phytec) — throughputLiteRTSmart62.66%36.61%-1.53484.09531.708.2~8v-959
MediumNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTSmart64.23%37.49%-0.65125.61188.017.8~8v-e28
MediumNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTLogical47.18%28.34%-9.80152.43174.206.5~7v-beb
MediumNXP i.MX 95 + eIQ Neutron NPU (Verdin) — throughputLiteRTSmart64.22%37.49%-0.65983.051044.658.1~8v-e1b
MediumNXP Ara240 (FRDM) — latencyAra DVMSmart58.60%34.00%-4.1431.0253.8830.9~31v-a34
MediumNXP Ara240 (FRDM) — throughputAra DVMSmart58.59%33.99%-4.1531.1555.7338.1~38v-a35
MediumRaspberry Pi 5 + Hailo-8L NPUHailo HEF—63.27%37.03%-1.1166.6086.1713.3~13v-931
MediumNVIDIA Jetson Orin Nano (TensorRT FP16)TensorRT—65.05%38.14%+0.0069.8299.6656.7~57v-92e

Validation pipeline

These results are produced by the EdgeFirst on-target validation pipeline:

  1. 1.EdgeFirst Profiler runs on the target hardware, executes the full inference pipeline (capture → preprocess → inference → postprocess), and scores the predictions against ground truth on the device. COCO accuracy and every timing block are computed in-process — there is no Python and no pycocotools on the target. It emits per-image predictions in EdgeFirst Arrow/Parquet, a Perfetto trace, and the computed metrics.
  2. 2.EdgeFirst Studio receives the metrics, predictions, charts and trace, and publishes them as the v-XXXX validation session every row above cites. Studio is where results are published, compared and browsed — it is not where they are computed.
  3. 3.EdgeFirst HAL (open source) provides the hardware-accelerated preprocessing and post-decoding primitives used at both validation and deployment time, so the timings measured here reflect the same accelerated paths a production runtime would take.

Inference latency is reported as the on-accelerator inference time. End-to-end latency is the sequential per-image latency across the compute pipeline — preprocessing, inference, and postprocessing; image acquisition (file or camera load and JPEG decode) overlaps these stages and is excluded from this figure.

Two throughput figures are reported. Realized FPS is the measured steady-state rate at which final results are emitted, measured directly from the profiler's per-frame result-emission timestamps over the steady-state stream — trace-independent; the Perfetto trace's own FPS is used only as a fallback on sessions where that scalar isn't available. It is the true, priority number and generally exceeds 1000 / end-to-end because the runtime overlaps stages across frames. Core-throughput ceiling (FPS) is the accelerator's core ceiling — 1000 / device-compute-time, i.e. the throughput if the accelerator were the only bottleneck. It is taken from the isolated device-compute stage (on transfer-split runtimes the trace separates host↔device transfers from device compute), which is load-independent — unlike the host capture/preprocess service times, whose measured cost inflates under pipeline backpressure (the same 5000 JPEGs cost ~7.8 ms/frame serialized but far more under throughput backpressure), so the slowest-stage figure would understate a fast accelerator. It is a possibly-achievable ceiling, not a measured result: reaching it depends on the deployment pipeline. A validation run decodes a JPEG per image and evaluates at a 0.001 confidence threshold (to capture every detection for mAP), both of which load the host and postprocess stages; a production camera pipeline (no JPEG decode) at a deployment threshold of 0.25–0.75 (far fewer candidate boxes through NMS) moves realized throughput toward the core-throughput ceiling.

See EdgeFirst Studio for the full validation pipeline.


Downloads

Artifacts are organized by deployment target. Each model file embeds the EdgeFirst edgefirst.json metadata (training session, dataset version, calibration artifact, converter chain) so a single file is sufficient for deployment — no sidecar configuration required.

Browse and download every artifact from the [repository file tree](https://huggingface.co/EdgeFirst/yolov8-seg/tree/main). Files are organized into per-target folders and follow the naming convention yolov8{size}-seg-{precision}[-smart]{extension}:

TargetFolderFormat
ONNX FP32onnx/.onnx
TFLite INT8tflite/.tflite
NXP i.MX 95 (eIQ Neutron)imx95/.imx95.tflite
NXP Ara240ara240/.dvm
RPi5 + Hailo-8L (13 TOPS)hailo/.hailo8l.hef
NVIDIA Jetson (TensorRT)jetson/.engine
Snapdragon (Qualcomm Hexagon HTP)qnn/.htp-v81.qnn.onnx

Each file embeds its edgefirst.json metadata (training session, dataset version, calibration artifact, converter chain), so a single download is sufficient for deployment — no sidecar configuration required.


Inference example (Python)

python
from edgefirst.hal import Model, TensorImage

# Load the model — embedded edgefirst.json carries labels and decoder config
model = Model("yolov8n-seg-int8.tflite")

# Run inference on an image
image = TensorImage.from_file("image.jpg")
results = model.predict(image)

# Iterate detections
for det in results.detections:
    print(f"{det.label}: {det.confidence:.2f} at {det.bbox}")
# Segmentation models also return one per-instance binary mask per
# detection (a H×W array thresholded at 128), decoded from the prototype masks
# and mask coefficients. See the EdgeFirst HAL mask materialization / overlay
# helpers for accessing and drawing them.

EdgeFirst HAL — Hardware abstraction layer with accelerated inference delegates. The n-seg INT8 artifact loaded above is the default (logical) decoder; the accuracy-optimized smart decoder benchmarked in the tables ships alongside it as yolov8n-seg-int8-smart.tflite. ---

Traceability

Every measurement in the tables above is reachable through the EdgeFirst Studio validation framework. The v-XXXX Source link on each row resolves to a public Studio URL of the form:

https://edgefirst.studio/public/validation/v-XXXX/details?mode=charts

The link lands on the Charts view — live system traces (CPU, memory, temperature, power) and per-stage timing recorded during the validation run. The Info and Metrics tabs on the same page carry the configuration and full COCO metric breakdown.

From there, the full provenance chain is one click deeper: training session ID, dataset version, calibration artifact, converter chain (e.g. TFLite quantizer + Neutron compile), validation parameters, and the host hardware description (hostname, kernel version, SoC, NPU, profiler version). The same model file you download from this repository embeds the same chain in its edgefirst.json metadata.


See also

Other model families in the EdgeFirst Model Zoo:

ModelTaskLink
YOLOv5 DetectionDetectionEdgeFirst/yolov5-det
YOLOv8 DetectionDetectionEdgeFirst/yolov8-det
YOLO11 DetectionDetectionEdgeFirst/yolo11-det
YOLO11 SegmentationSegmentationEdgeFirst/yolo11-seg
YOLO26 DetectionDetectionEdgeFirst/yolo26-det
YOLO26 SegmentationSegmentationEdgeFirst/yolo26-seg

Train your own with EdgeFirst Studio

Train on your own dataset with **EdgeFirst Studio**:

  • —Free tier includes YOLO training with automatic INT8 quantization and edge deployment.
  • —Upload datasets via EdgeFirst Recorder or COCO/YOLO format.
  • —AI-assisted annotation with auto-labeling.
  • —CameraAdaptor integration for native sensor format training.
  • —Deploy trained models to edge devices via EdgeFirst Client.

Technical notes

Quantization pipeline

All TFLite INT8 models are produced by EdgeFirst's quantization pipeline (details):

  1. 1.ONNX export — standard Ultralytics export with simplify=True
  2. 2.TF-wrapped ONNX — box coordinates normalized to [0, 1] inside DFL decode
  3. 3.Split decoder — boxes, scores, and mask coefficients split into separate output tensors so each receives an independent INT8 quantization scale
  4. 4.Smart calibration — calibration samples selected via greedy coverage maximization; the artifact is content-addressed by parameter hash and cached in Studio for deterministic reuse
  5. 5.Full integer INT8 — uint8 input, int8 output, MLIR quantizer

Split decoder output format

Segmentation (e.g. yolov8n-seg):

  • —boxes — (1, 4, 8400) normalized [0, 1] coordinates
  • —scores — (1, 80, 8400) per-class probabilities
  • —mask_coefs — (1, 32, 8400) per-anchor mask coefficients
  • —protos — (1, 160, 160, 32) prototype masks

Each tensor has its own quantization scale and zero point. The EdgeFirst HAL handles dequantization and reassembly automatically; no application code change is required across NPU targets.

Embedded metadata

  • —TFLite: edgefirst.json and labels.txt embedded in the ZIP-format model file
  • —ONNX: edgefirst.json embedded in model.metadata_props

No sidecar files required; the model artifact is self-contained.


Limitations

  • —COCO bias — models trained on COCO (80 classes) inherit the dataset's biases (Western-centric scenes, particular object distributions, limited weather/lighting diversity).
  • —Quantization loss — integer quantization introduces accuracy loss relative to FP32: INT8 on the NXP i.MX 8M Plus / i.MX 95 Neutron and Hailo NPUs, and a mixed INT8/INT16 scheme on the NXP Ara240 (the box-regression path is promoted to INT16 for localization accuracy). The magnitude per platform is shown in the Δ vs FP32 column above.
  • —Configurations under active investigation — a subset of INT8 results measure below expectations and are marked ⚠ above; these are tracked for resolution, not accepted as final. The main cases are YOLO11 / YOLO26 on the NXP i.MX 8M Plus VeriSilicon NPU (the most constrained accelerator, where the newer architectures quantize poorly) and some NXP Ara240 segmentation runs. YOLO11 / YOLO26 on the NXP i.MX 95 eIQ Neutron NPU are not yet supported (a delegate limitation) and render without numbers. Each next card snapshot reflects any recovered accuracy.
  • —Input resolution — all models expect 640×640 input; other resolutions require letterboxing.

License

Model weights in this repository are derived from Ultralytics YOLO and remain © Ultralytics Inc., licensed AGPL-3.0 — use requires AGPL-3.0 compliance or an Ultralytics Enterprise License.

The validation results, this model card, and its metadata are Au-Zone Technologies' own contribution, licensed [CC BY-NC 4.0](https://creativecommons.org/licenses/by-nc/4.0/) (Attribution — NonCommercial) — see the repository LICENSE for the full text and citation requirements.


Citation

bibtex
@software{edgefirst_yolov8_seg,
  title = { {YOLOv8 Segmentation — EdgeFirst Model Zoo} },
  author = {Au-Zone Technologies},
  url = {https://huggingface.co/EdgeFirst/yolov8-seg},
  year = {2026},
  license = {CC-BY-NC-4.0},
}

<p align="center"> <sub> <a href="https://edgefirst.studio">EdgeFirst Studio</a> · <a href="https://github.com/EdgeFirstAI">GitHub</a> · <a href="https://doc.edgefirst.ai">Docs</a> · <a href="https://www.au-zone.com">Au-Zone Technologies</a><br> Model weights © Ultralytics Inc. (AGPL-3.0) · Validation results &amp; card © 2026 Au-Zone Technologies (CC BY-NC 4.0)<br> NXP<sup>®</sup>, i.MX, eIQ<sup>®</sup>, Neutron, and Ara240 are trademarks or products of NXP Semiconductors. Hailo is a trademark of Hailo Technologies Ltd. Jetson is a trademark of NVIDIA Corporation. All other trademarks are the property of their respective owners. </sub> </p>