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EdgeFirst/yolov5-det

sourceHugging Faceagpl-3.0updated 11d agoView on Hugging Face
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Model Card

YOLOv5 Detection — EdgeFirst Model Zoo

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![EdgeFirst Model Zoo](https://huggingface.co/spaces/EdgeFirst/Models)

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YOLOv5 Detection models trained on COCO 2017 (80 classes) and validated on real edge hardware with the EdgeFirst Profiler, which runs the pipeline and computes the accuracy on the device itself. Each row in the tables below cites the EdgeFirst Studio validation session (v-XXXX) that produced the measurement.

Part of the EdgeFirst Model Zoo. New here? [Introducing the EdgeFirst Model Zoo](https://huggingface.co/blog/EdgeFirst/model-zoo-intro) covers what is in the zoo, why every figure links to its validation session, and how to reproduce any of it on your own hardware. Want a platform, model or task we don't cover yet? Vote on what we measure next.

[!TIP] Training experiment: View on EdgeFirst Studio — dataset, training configuration, metrics, and exported artifacts.
[!NOTE] Legacy architecture, wide deployment base.

Reference accuracy — ONNX FP32

Accuracy ceiling for each size, measured against COCO val2017 (5,000 images) with pycocotools. Quantized and compiled artifacts (TFLite INT8, HEF, etc.) are graded against this reference per the EdgeFirst publication rule.

SizeParamsGFLOPsmAP@0.5mAP@0.5-0.95mAP@0.75Source
Nano1.9M4.547.75%32.95%35.62%v-e61
Small7.2M16.557.33%41.26%44.95%v-e74
Medium21.2M49.063.29%46.99%51.33%v-e88
Large46.5M109.1————
XLarge86.7M205.7————
Sizes. The EdgeFirst Model Zoo currently validates Nano, Small, and Medium. The Large and XLarge variants are not evaluated at this time — their parameter and GFLOP counts are listed above for reference, with accuracy shown as —.

Accuracy methodology & relation to Ultralytics

Every model in this zoo uses the official Ultralytics pretrained weights, byte-for-byte — there is no re-training. These are the same models Ultralytics ships, measured on the deployment-realistic path: a fixed-input ONNX graph (square letterbox, rect=False), the standard COCO AP@[maxDets=100] convention, and COCO crowd regions scored as normal detections. Ultralytics' headline COCO numbers use their internal validator (rectangular inference, crowd-ignored, maxDets=300), so a small, fully-explained offset on identical weights is expected — not an accuracy deficit.

Reconciling nano detection (COCO val2017, mAP@0.5:0.95, FP32):

SourceNano mAP@0.5:0.95What it measures
EdgeFirst (this zoo)32.95%Full deployment path — fixed-input ONNX + pycocotools
Ultralytics-validator proxy33.71%Portable re-implementation of the Ultralytics validator
Ultralytics (official)34.3%Ultralytics' published COCO figure

The ~1 pp spread decomposes into a ~0.6–0.7 pp methodology leg (square-letterbox / crowd / maxDets) and a ~0.5–0.9 pp deployment-decode leg. The methodology leg is measured, not assumed: a rect=True + crowd-ignored parity pass reproduces the official figure (e.g. YOLOv5n → 34.4 vs 34.3 official). The decode leg shrinks toward zero for the NMS-free YOLO26, which already matches its official number. None of the offset reflects a weight or training difference.


On-target validation results

Each row is one EdgeFirst Studio validation session. Click the Source link to inspect the full session — model artifact, dataset version, parameters, per-stage Perfetto trace, and the host hardware description (hostname, kernel version, SoC, NPU, profiler version).

Row conventions in the table below:

  • —Rows whose `Δ` cell reads `ref` are the float reference runs each quantized/compiled measurement is graded against.
  • —Rows without a number under the metric columns are validation sessions currently in progress, or a session not yet linked to its ONNX FP32 reference. The Studio Source link tracks the current status.
  • —Rows whose `Δ vs FP32` cell carries a ⚠ are below our accuracy expectations for that platform (more than 10 percentage points under the float reference). The numbers are real measurements on real hardware, reproducible from the linked Studio session, and we publish them as-is; we are investigating the results to make improvements, and the next snapshot of this card will reflect any recovered accuracy.
  • —Precision varies by target: the ONNX reference rows are FP32; macOS CoreML and NVIDIA Jetson TensorRT run FP16; the NXP i.MX 8M Plus, NXP i.MX 95 Neutron, and Hailo NPUs run INT8. The NXP Ara240 DNPU runs a mixed INT8/INT16 scheme — most of the model is INT8, with the box-regression path (and the ops feeding it) promoted to INT16 to improve localization accuracy.
  • —Decoder variants. EdgeFirst ships three INT8 split-decoders — smart, logical, and combined (described under Decode below). Every one we have measured is listed; none is headlined over another, because which one wins is a property of the target, not of the variant. Full converter documentation: EdgeFirst model conversion — these are the converters used by this Model Zoo and the EdgeFirst Performance Index report.
  • —Runtime. Which inference stack executed the model. It is a column of its own because one accelerator can be reached by more than one: on Qualcomm Hexagon HTP, ONNX · QNN EP is an ONNX Runtime EPContext binary while LiteRT is the LiteRT + QNN delegate path, and the two produce measurably different pipelines from the same weights on the same silicon. Compare rows that share a size, platform, precision, and decode to read that difference directly.
  • —Decode. What the exported graph emits, and therefore what your application has to do with it. Logical keeps the head's outputs separate and named — boxes, scores, and for segmentation the mask prototypes and coefficients — so reading them needs no decoder beyond taking the tensors as they come. Smart cuts the graph further upstream, at a point chosen by dynamic range and sliceability: the operations that quantize worst are lifted out of the model and run outside it, which is what recovers the accuracy, and which is why it needs a decoder implementing that cut (in EdgeFirst deployments, the HAL provides it). Combined fuses the decode into the quantized graph — the standard upstream export. It is the least accurate of the three by construction, and the EdgeFirst converters do not emit it for quantized targets; rows appear only where one was measured. Compare rows sharing a size and platform to see what the cut buys on your target — on detection it is often small, on quantized segmentation masks it is usually decisive. A — means the run carries no quantized decode split at all (float ONNX / TensorRT / CoreML).
  • —Rows are not ranked. Where a size and platform appear more than once, the rows are competing configurations — a different runtime, precision, decode variant, pipeline mode, or board — not duplicates. Only genuinely repeated measurements of the same configuration are collapsed, newest first.
  • —Platform-label suffixes. (FRDM) / (Phytec) name the NXP i.MX 95 development board a session ran on. — latency / — throughput mark the two pipeline configurations the NXP i.MX 95 Neutron and NXP Ara240 targets run: the latency pipeline runs inference serially for the lowest per-frame latency; the throughput pipeline runs multiple inference workers for the highest FPS, which raises per-call inference time in exchange. Rows with neither suffix run a single pipeline.
  • —End-to-end (ms) is the sequential per-image latency of the compute pipeline — preprocess → inference → postprocess. Image acquisition (camera or file load + JPEG decode) overlaps these stages and is excluded from this figure.
  • —Realized FPS vs Core-throughput ceiling (FPS). Realized FPS is the measured steady-state throughput — the rate at which final results are actually delivered over the full validation pipeline. It normally exceeds 1000 / end-to-end because the runtime overlaps stages across frames, and it is the true, priority number. Core-throughput ceiling (FPS) (shown with a ~) is the accelerator's core ceiling — 1000 / device-compute-time, the rate the NPU/DNPU could sustain if it were the only bottleneck — so it is a possibly-achievable note, not a claim. It is read from the isolated device-compute stage, which (unlike the host capture/preprocess stages, whose measured time inflates when the pipeline is backpressured) is stable and load-independent. Whether a deployment approaches it depends on the surrounding pipeline, and two levers dominate: (1) host bottlenecks — these validation runs decode a JPEG per image, whereas a live camera pipeline skips that decode and can run closer to the ceiling; and (2) confidence threshold — validation runs at 0.001 to capture every detection for mAP, which makes NMS/decode heavy, while a deployment threshold of 0.25–0.75 produces far fewer candidate boxes and lighter postprocessing, raising realized FPS toward the ceiling.
SizePlatformRuntimeDecodemAP@0.5Δ vs FP32 (pp)mAP@0.5-0.95Inference (ms)End-to-end (ms)Realized FPSCore-throughput ceiling (FPS)Source
NanoONNX FP32 (AWS Graviton · 4-core)ONNX—47.74%-0.0132.94%342.52355.1811.5~3v-e53
NanoONNX FP32 (AWS Graviton4 · 48-core)ONNX—47.74%-0.0132.94%73.3285.89168.7~14v-e59
NanoONNX FP32 (AWS Graviton4 · 8-core)ONNX—47.74%-0.0132.94%213.36220.4636.9~5v-e56
NanoONNX FP32 (Intel Core i9-13900F · 32-core)ONNX—47.76%+0.0132.95%34.2745.0880.1~80v-a45
NanoONNX FP32 (Intel Xeon Platinum 8488C · 24-core)ONNX—47.75%+0.0032.95%67.9989.22159.4~15v-e5b
NanoONNX FP32 (Intel Xeon Platinum 8488C · 4-core)ONNX—47.76%+0.0132.95%147.37160.1051.2~7v-e58
NanoONNX FP32 (CUDA)ONNX—47.75%ref32.95%6.7615.78328.9~329v-e61
NanoONNX FP32 (CUDA)ONNX—47.75%+0.0032.95%7.7112.85357.8~358v-a87
NanoONNX FP16 (CUDA)ONNX—47.75%+0.0032.93%6.0011.65456.8~457v-a9c
NanoTFLite INT8 (Intel Xeon Platinum 8488C · 24-core)LiteRTCombined45.14%-2.6129.98%179.39190.0660.8~6v-10f4
NanoTFLite INT8 (Intel Xeon Platinum 8488C · 4-core)LiteRTCombined45.15%-2.6029.98%284.68291.3427.7~4v-10dd
NanoTFLite INT8 (AWS Graviton4 · 48-core)LiteRTCombined45.13%-2.6230.03%75.4685.56167.9~13v-10ea
NanoTFLite INT8 (AWS Graviton4 · 8-core)LiteRTCombined45.11%-2.6430.01%164.17168.9747.9~6v-10e6
NanoApple M2 Max — CoreML Neural Engine (FP16)ONNX—47.12%-0.6332.42%1.625.39862.2~864v-baf
NanoApple M2 Max — CoreML Metal GPU (FP16)ONNX—47.16%-0.5932.45%5.539.41477.4~477v-9cb
NanoApple M2 Max — CoreML CPU (FP16)ONNX—47.14%-0.6132.43%15.4319.38121.3~121v-9cc
NanoApple iPhone 17 Pro — CoreML Neural Engine (FP16)ONNX—47.13%-0.6232.42%1.846.06825.8~335v-f49
NanoApple iPhone 17 Pro — CoreML Metal GPU (FP16)ONNX—47.16%-0.5932.45%4.608.58390.3~217v-f44
NanoApple iPhone 17 Pro — CoreML CPU (FP16)ONNX—47.14%-0.6132.42%14.8520.54127.4~67v-f2e
NanoApple iPhone 15 Pro — CoreML Neural Engine (FP16)ONNX—47.14%-0.6132.42%1.819.79630.1~178v-f0a
NanoApple iPhone 15 Pro — CoreML Metal GPU (FP16)ONNX—47.16%-0.5932.45%12.3516.40152.6~81v-f09
NanoApple iPhone 15 Pro — CoreML CPU (FP16)ONNX—47.14%-0.6132.42%16.9524.64110.1~59v-f08
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPSmart46.70%-1.0531.87%1.4714.34274.2~278v-1058
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPLogical44.60%-3.1529.46%1.806.80745.9~757v-105a
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPSmart47.70%-0.0532.73%2.7316.83243.1~247v-1051
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPLogical46.93%-0.8231.89%4.7113.65359.2~375v-1055
NanoSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)LiteRTSmart47.04%-0.7132.20%3.8317.99233.4~239v-1052
NanoSamsung Galaxy S26 Ultra — CPULiteRTSmart46.90%-0.8532.21%72.7391.9574.7~14v-1053
NanoNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTCombined44.51%-3.2429.47%63.5997.4813.5~16v-8ba
NanoNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTLogical44.51%-3.2429.47%63.3797.3113.5~16v-8bd
NanoNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTSmart46.53%-1.2231.89%57.78110.6514.6~17v-8bf
NanoNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — latencyLiteRTLogical44.51%-3.2429.47%64.14106.9413.4~15v-c79
NanoNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughputLiteRTSmart46.53%-1.2231.89%58.37132.2414.4~17v-c76
NanoNXP i.MX 95 + eIQ Neutron NPU — latencyLiteRTSmart46.46%-1.2931.57%12.7638.6761.2~63v-e30
NanoNXP i.MX 95 + eIQ Neutron NPU — throughputLiteRTSmart46.46%-1.2931.58%32.5667.5885.3~50v-e31
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTSmart45.86%-1.8931.14%12.9543.7555.2~56v-8ad
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTLogical43.80%-3.9528.82%42.8357.2822.3~23v-8aa
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTCombined43.80%-3.9528.82%42.5156.9022.5~23v-8a6
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTSmart45.86%-1.8931.14%20.9759.8875.1~45v-8ae
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTLogical43.80%-3.9528.82%60.5979.8562.5~62v-8ac
NanoNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTCombined43.80%-3.9528.82%59.7878.7363.4~63v-8a9
NanoNXP i.MX 95 + eIQ Neutron NPU (Phytec) — throughputLiteRTSmart45.86%-1.8931.14%25.1058.3084.0~49v-897
NanoNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTSmart46.46%-1.2931.57%13.0840.9458.0~60v-e20
NanoNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTLogical44.44%-3.3129.26%39.1251.1324.5~25v-bc7
NanoNXP i.MX 95 + eIQ Neutron NPU (Verdin) — throughputLiteRTSmart46.46%-1.2931.58%22.6562.6778.9~47v-e09
NanoNXP Ara240 (FRDM) — latencyAra DVMSmart45.00%-2.7530.12%8.2820.52104.1~106v-a10
NanoNXP Ara240 (FRDM) — throughputAra DVMSmart44.99%-2.7630.11%8.6631.50193.5~194v-a11
NanoRaspberry Pi 5 + Hailo-8L NPUHailo HEF—45.97%-1.7831.57%14.6726.4466.6~67v-8de
NanoNVIDIA Jetson Orin Nano (TensorRT FP16)TensorRT—47.77%+0.0232.93%8.5423.99271.2~271v-919
SmallONNX FP32 (AWS Graviton · 4-core)ONNX—57.29%-0.0441.22%688.02699.255.8~1v-e54
SmallONNX FP32 (AWS Graviton4 · 8-core)ONNX—57.29%-0.0441.23%563.94570.3214.1~2v-e71
SmallONNX FP32 (AWS Graviton4 · 48-core)ONNX—57.29%-0.0441.23%187.11198.0468.0~5v-e64
SmallONNX FP32 (Intel Core i9-13900F · 32-core)ONNX—57.32%-0.0141.26%82.0693.6733.6~34v-a4c
SmallONNX FP32 (Intel Xeon Platinum 8488C · 24-core)ONNX—57.33%+0.0041.26%153.74174.8580.1~7v-e65
SmallONNX FP32 (Intel Xeon Platinum 8488C · 4-core)ONNX—57.33%+0.0041.26%302.69312.3125.9~3v-e79
SmallONNX FP32 (CUDA)ONNX—57.33%ref41.26%9.5418.54321.5~322v-e74
SmallONNX FP32 (CUDA)ONNX—57.33%+0.0041.26%13.6919.29224.0~224v-a8e
SmallONNX FP16 (CUDA)ONNX—57.33%+0.0041.22%9.7315.36319.3~319v-aa3
SmallTFLite INT8 (Intel Xeon Platinum 8488C · 24-core)LiteRTCombined54.94%-2.3937.45%342.35353.1333.5~3v-10fa
SmallTFLite INT8 (Intel Xeon Platinum 8488C · 4-core)LiteRTCombined54.94%-2.3937.45%681.61688.1711.6~1v-10f3
SmallTFLite INT8 (AWS Graviton4 · 48-core)LiteRTCombined54.68%-2.6537.32%172.71182.5474.0~6v-10ef
SmallTFLite INT8 (AWS Graviton4 · 8-core)LiteRTCombined54.68%-2.6537.32%426.25430.6318.7~2v-10e9
SmallApple M2 Max — CoreML Neural Engine (FP16)ONNX—56.72%-0.6140.68%4.317.85394.1~404v-9ea
SmallApple M2 Max — CoreML Metal GPU (FP16)ONNX—56.75%-0.5840.76%13.8117.34205.1~205v-9eb
SmallApple M2 Max — CoreML CPU (FP16)ONNX—56.72%-0.6140.71%29.9634.0464.2~64v-9ec
SmallApple iPhone 17 Pro — CoreML Neural Engine (FP16)ONNX—56.72%-0.6140.70%4.978.56350.8~201v-f53
SmallApple iPhone 17 Pro — CoreML Metal GPU (FP16)ONNX—56.75%-0.5840.76%16.4020.23116.5~61v-f4a
SmallApple iPhone 17 Pro — CoreML CPU (FP16)ONNX—56.72%-0.6140.71%40.1746.6248.6~25v-f36
SmallApple iPhone 15 Pro — CoreML Neural Engine (FP16)ONNX—56.72%-0.6140.69%6.9413.63247.0~144v-f12
SmallApple iPhone 15 Pro — CoreML Metal GPU (FP16)ONNX—56.75%-0.5840.76%41.8551.1145.6~24v-f1a
SmallApple iPhone 15 Pro — CoreML CPU (FP16)ONNX—56.72%-0.6140.71%52.6161.2137.0~19v-f1c
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPSmart56.69%-0.6440.42%1.9014.88271.5~276v-1061
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPLogical53.79%-3.5436.43%2.677.69620.9~640v-1064
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPSmart57.51%+0.1841.20%3.6219.35221.6~225v-105c
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPLogical56.56%-0.7740.25%6.1714.95297.5~316v-1060
SmallSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)LiteRTSmart57.49%+0.1641.02%5.4919.09216.8~224v-105d
SmallSamsung Galaxy S26 Ultra — CPULiteRTSmart57.29%-0.0440.93%161.61187.6035.2~6v-1063
SmallNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTCombined54.21%-3.1237.02%115.14148.928.0~9v-932
SmallNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTLogical54.21%-3.1237.02%114.90148.558.0~9v-936
SmallNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTSmart56.87%-0.4640.69%109.41161.038.3~9v-939
SmallNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — latencyLiteRTLogical54.21%-3.1237.02%116.35158.767.9~9v-c8b
SmallNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughputLiteRTSmart56.87%-0.4640.69%110.65181.568.2~9v-c8a
SmallNXP i.MX 95 + eIQ Neutron NPU — latencyLiteRTSmart57.43%+0.1040.93%33.2063.5928.8~29v-e38
SmallNXP i.MX 95 + eIQ Neutron NPU — throughputLiteRTSmart57.42%+0.0940.92%247.74276.9531.9~32v-e39
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTSmart56.67%-0.6640.36%33.7367.6327.3~27v-8fa
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTLogical53.96%-3.3736.64%69.3383.9314.0~14v-8f6
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTCombined53.96%-3.3736.64%67.6184.8714.4~15v-8f2
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTSmart56.67%-0.6640.36%124.58159.6131.2~31v-8fb
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTLogical53.96%-3.3736.64%126.63142.9730.9~31v-8f8
SmallNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTCombined53.96%-3.3736.64%126.49142.7031.0~31v-8f4
SmallNXP i.MX 95 + eIQ Neutron NPU (Phytec) — throughputLiteRTSmart56.67%-0.6640.36%121.68154.4532.0~32v-8f0
SmallNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTSmart57.43%+0.1040.92%33.2165.3928.8~29v-e21
SmallNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTLogical54.52%-2.8137.10%59.5871.5916.3~17v-bd5
SmallNXP i.MX 95 + eIQ Neutron NPU (Verdin) — throughputLiteRTSmart57.42%+0.0940.92%250.01281.2031.6~32v-e10
SmallNXP Ara240 (FRDM) — latencyAra DVMSmart54.56%-2.7737.69%13.4725.5468.1~68v-a1e
SmallNXP Ara240 (FRDM) — throughputAra DVMSmart54.54%-2.7937.67%13.5026.5896.3~96v-a1f
SmallRaspberry Pi 5 + Hailo-8L NPUHailo HEF—56.13%-1.2040.02%29.3643.9032.1~32v-8eb
SmallNVIDIA Jetson Orin Nano (TensorRT FP16)TensorRT—57.32%-0.0141.24%22.0434.77174.6~174v-921
MediumONNX FP32 (AWS Graviton · 4-core)ONNX—63.30%+0.0147.00%1697.561706.652.4~1v-e55
MediumONNX FP32 (AWS Graviton4 · 8-core)ONNX—63.30%+0.0147.00%1416.241422.325.6~1v-e73
MediumONNX FP32 (AWS Graviton4 · 48-core)ONNX—63.30%+0.0147.00%459.77470.9227.7~2v-e6b
MediumONNX FP32 (Intel Core i9-13900F · 32-core)ONNX—63.29%+0.0046.99%200.15211.9614.1~14v-a53
MediumONNX FP32 (Intel Xeon Platinum 8488C · 24-core)ONNX—63.29%+0.0046.99%364.00385.3934.1~3v-e6a
MediumONNX FP32 (Intel Xeon Platinum 8488C · 4-core)ONNX—63.29%+0.0046.99%933.88944.858.5~1v-e7a
MediumONNX FP32 (CUDA)ONNX—63.29%ref46.99%21.1929.12176.2~176v-e88
MediumONNX FP32 (CUDA)ONNX—63.29%+0.0046.99%33.8140.4897.0~97v-a95
MediumONNX FP16 (CUDA)ONNX—63.27%-0.0246.94%20.0326.34166.1~166v-aaa
MediumTFLite INT8 (Intel Xeon Platinum 8488C · 24-core)LiteRTCombined60.15%-3.1442.20%757.74769.7916.1~1v-10fb
MediumTFLite INT8 (Intel Xeon Platinum 8488C · 4-core)LiteRTCombined60.15%-3.1442.20%1712.521719.584.6~1v-10e0
MediumTFLite INT8 (AWS Graviton4 · 48-core)LiteRTCombined60.16%-3.1342.34%396.14406.1332.3~3v-10f0
MediumTFLite INT8 (AWS Graviton4 · 8-core)LiteRTCombined60.15%-3.1442.33%1060.221064.517.5~1v-10eb
MediumApple M2 Max — CoreML Neural Engine (FP16)ONNX—62.78%-0.5146.53%11.5315.16162.2~164v-75b
MediumApple M2 Max — CoreML Metal GPU (FP16)ONNX—62.80%-0.4946.52%33.2737.5087.8~88v-765
MediumApple M2 Max — CoreML CPU (FP16)ONNX—62.75%-0.5446.46%56.5860.6834.6~35v-9dc
MediumApple iPhone 17 Pro — CoreML Neural Engine (FP16)ONNX—62.78%-0.5146.53%14.4118.32131.8~69v-f59
MediumApple iPhone 17 Pro — CoreML Metal GPU (FP16)ONNX—62.80%-0.4946.51%32.0840.5959.7~31v-f54
MediumApple iPhone 17 Pro — CoreML CPU (FP16)ONNX—62.75%-0.5446.45%92.8599.6321.3~11v-f3d
MediumApple iPhone 15 Pro — CoreML Neural Engine (FP16)ONNX—62.78%-0.5146.54%18.0323.79104.7~55v-f1b
MediumApple iPhone 15 Pro — CoreML Metal GPU (FP16)ONNX—62.80%-0.4946.51%114.12129.3117.0~9v-f28
MediumApple iPhone 15 Pro — CoreML CPU (FP16)ONNX—62.75%-0.5446.46%121.21129.6816.3~8v-f29
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPSmart62.86%-0.4346.44%4.0216.44265.0~270v-106b
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)ONNX · QNN EPLogical59.41%-3.8841.50%5.9111.13326.4~338v-106d
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPSmart63.51%+0.2247.08%7.9928.41155.0~157v-1066
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT16)ONNX · QNN EPLogical62.53%-0.7646.05%12.2722.11158.0~163v-1069
MediumSamsung Galaxy S26 Ultra — Qualcomm Hexagon NPU (INT8)LiteRTSmart63.21%-0.0846.75%14.2827.31134.2~139v-1067
MediumSamsung Galaxy S26 Ultra — CPULiteRTSmart63.35%+0.0646.79%352.87379.8716.6~3v-1076
MediumNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTCombined59.62%-3.6741.74%212.49247.334.5~5v-975
MediumNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTLogical59.62%-3.6741.74%212.31246.134.5~5v-978
MediumNXP i.MX 8M Plus + VeriSilicon NPU (FRDM)LiteRTSmart62.79%-0.5046.34%206.67258.594.6~5v-97b
MediumNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — latencyLiteRTLogical59.62%-3.6741.74%215.14257.324.4~5v-c9d
MediumNXP i.MX 8M Plus + VeriSilicon NPU (Verdin) — throughputLiteRTSmart62.79%-0.5046.34%208.98279.944.5~5v-c9c
MediumNXP i.MX 95 + eIQ Neutron NPU — latencyLiteRTSmart63.42%+0.1346.86%77.85116.5212.6~13v-e3d
MediumNXP i.MX 95 + eIQ Neutron NPU — throughputLiteRTSmart63.42%+0.1346.86%604.29640.1313.2~13v-e3e
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTSmart62.77%-0.5246.30%78.06110.9512.3~12v-96b
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTLogical59.40%-3.8941.61%113.44127.738.6~9v-968
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — latencyLiteRTCombined59.40%-3.8941.61%112.99127.128.7~9v-966
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTSmart62.77%-0.5246.30%301.76335.7413.1~13v-96c
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTLogical59.40%-3.8941.61%304.24321.0513.0~13v-96a
MediumNXP i.MX 95 + eIQ Neutron NPU (FRDM) — throughputLiteRTCombined59.40%-3.8941.61%304.16320.9613.0~13v-967
MediumNXP i.MX 95 + eIQ Neutron NPU (Phytec) — throughputLiteRTSmart62.77%-0.5246.30%297.44329.3013.2~13v-94b
MediumNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTSmart63.42%+0.1346.86%77.47120.0512.7~13v-e22
MediumNXP i.MX 95 + eIQ Neutron NPU (Verdin) — latencyLiteRTLogical59.97%-3.3242.12%103.73115.739.5~10v-be3
MediumNXP i.MX 95 + eIQ Neutron NPU (Verdin) — throughputLiteRTSmart63.42%+0.1346.87%604.31647.6113.2~13v-e17
MediumNXP Ara240 (FRDM) — latencyAra DVMSmart60.72%-2.5743.55%24.3836.4139.0~39v-a2c
MediumNXP Ara240 (FRDM) — throughputAra DVMSmart60.70%-2.5943.54%24.3637.1947.0~47v-a2d
MediumRaspberry Pi 5 + Hailo-8L NPUHailo HEF—62.40%-0.8946.17%57.3872.7116.2~16v-906
MediumNVIDIA Jetson Orin Nano (TensorRT FP16)TensorRT—63.31%+0.0246.96%44.4956.8088.2~88v-92a

Validation pipeline

These results are produced by the EdgeFirst on-target validation pipeline:

  1. 1.EdgeFirst Profiler runs on the target hardware, executes the full inference pipeline (capture → preprocess → inference → postprocess), and scores the predictions against ground truth on the device. COCO accuracy and every timing block are computed in-process — there is no Python and no pycocotools on the target. It emits per-image predictions in EdgeFirst Arrow/Parquet, a Perfetto trace, and the computed metrics.
  2. 2.EdgeFirst Studio receives the metrics, predictions, charts and trace, and publishes them as the v-XXXX validation session every row above cites. Studio is where results are published, compared and browsed — it is not where they are computed.
  3. 3.EdgeFirst HAL (open source) provides the hardware-accelerated preprocessing and post-decoding primitives used at both validation and deployment time, so the timings measured here reflect the same accelerated paths a production runtime would take.

Inference latency is reported as the on-accelerator inference time. End-to-end latency is the sequential per-image latency across the compute pipeline — preprocessing, inference, and postprocessing; image acquisition (file or camera load and JPEG decode) overlaps these stages and is excluded from this figure.

Two throughput figures are reported. Realized FPS is the measured steady-state rate at which final results are emitted, measured directly from the profiler's per-frame result-emission timestamps over the steady-state stream — trace-independent; the Perfetto trace's own FPS is used only as a fallback on sessions where that scalar isn't available. It is the true, priority number and generally exceeds 1000 / end-to-end because the runtime overlaps stages across frames. Core-throughput ceiling (FPS) is the accelerator's core ceiling — 1000 / device-compute-time, i.e. the throughput if the accelerator were the only bottleneck. It is taken from the isolated device-compute stage (on transfer-split runtimes the trace separates host↔device transfers from device compute), which is load-independent — unlike the host capture/preprocess service times, whose measured cost inflates under pipeline backpressure (the same 5000 JPEGs cost ~7.8 ms/frame serialized but far more under throughput backpressure), so the slowest-stage figure would understate a fast accelerator. It is a possibly-achievable ceiling, not a measured result: reaching it depends on the deployment pipeline. A validation run decodes a JPEG per image and evaluates at a 0.001 confidence threshold (to capture every detection for mAP), both of which load the host and postprocess stages; a production camera pipeline (no JPEG decode) at a deployment threshold of 0.25–0.75 (far fewer candidate boxes through NMS) moves realized throughput toward the core-throughput ceiling.

See EdgeFirst Studio for the full validation pipeline.


Downloads

Artifacts are organized by deployment target. Each model file embeds the EdgeFirst edgefirst.json metadata (training session, dataset version, calibration artifact, converter chain) so a single file is sufficient for deployment — no sidecar configuration required.

Browse and download every artifact from the [repository file tree](https://huggingface.co/EdgeFirst/yolov5-det/tree/main). Files are organized into per-target folders and follow the naming convention yolov5{size}-det-{precision}[-smart]{extension}:

TargetFolderFormat
ONNX FP32onnx/.onnx
TFLite INT8tflite/.tflite
NXP i.MX 95 (eIQ Neutron)imx95/.imx95.tflite
NXP Ara240ara240/.dvm
RPi5 + Hailo-8L (13 TOPS)hailo/.hailo8l.hef
NVIDIA Jetson (TensorRT)jetson/.engine
Snapdragon (Qualcomm Hexagon HTP)qnn/.htp-v81.qnn.onnx

Each file embeds its edgefirst.json metadata (training session, dataset version, calibration artifact, converter chain), so a single download is sufficient for deployment — no sidecar configuration required.


Inference example (Python)

python
from edgefirst.hal import Model, TensorImage

# Load the model — embedded edgefirst.json carries labels and decoder config
model = Model("yolov5n-det-int8.tflite")

# Run inference on an image
image = TensorImage.from_file("image.jpg")
results = model.predict(image)

# Iterate detections
for det in results.detections:
    print(f"{det.label}: {det.confidence:.2f} at {det.bbox}")

EdgeFirst HAL — Hardware abstraction layer with accelerated inference delegates. ---

Traceability

Every measurement in the tables above is reachable through the EdgeFirst Studio validation framework. The v-XXXX Source link on each row resolves to a public Studio URL of the form:

https://edgefirst.studio/public/validation/v-XXXX/details?mode=charts

The link lands on the Charts view — live system traces (CPU, memory, temperature, power) and per-stage timing recorded during the validation run. The Info and Metrics tabs on the same page carry the configuration and full COCO metric breakdown.

From there, the full provenance chain is one click deeper: training session ID, dataset version, calibration artifact, converter chain (e.g. TFLite quantizer + Neutron compile), validation parameters, and the host hardware description (hostname, kernel version, SoC, NPU, profiler version). The same model file you download from this repository embeds the same chain in its edgefirst.json metadata.


See also

Other model families in the EdgeFirst Model Zoo:

ModelTaskLink
YOLOv8 DetectionDetectionEdgeFirst/yolov8-det
YOLOv8 SegmentationSegmentationEdgeFirst/yolov8-seg
YOLO11 DetectionDetectionEdgeFirst/yolo11-det
YOLO11 SegmentationSegmentationEdgeFirst/yolo11-seg
YOLO26 DetectionDetectionEdgeFirst/yolo26-det
YOLO26 SegmentationSegmentationEdgeFirst/yolo26-seg

Train your own with EdgeFirst Studio

Train on your own dataset with **EdgeFirst Studio**:

  • —Free tier includes YOLO training with automatic INT8 quantization and edge deployment.
  • —Upload datasets via EdgeFirst Recorder or COCO/YOLO format.
  • —AI-assisted annotation with auto-labeling.
  • —CameraAdaptor integration for native sensor format training.
  • —Deploy trained models to edge devices via EdgeFirst Client.

Technical notes

Quantization pipeline

All TFLite INT8 models are produced by EdgeFirst's quantization pipeline (details):

  1. 1.ONNX export — standard Ultralytics export with simplify=True
  2. 2.TF-wrapped ONNX — box coordinates normalized to [0, 1] inside DFL decode
  3. 3.Split decoder — boxes and scores split into separate output tensors so each receives an independent INT8 quantization scale
  4. 4.Smart calibration — calibration samples selected via greedy coverage maximization; the artifact is content-addressed by parameter hash and cached in Studio for deterministic reuse
  5. 5.Full integer INT8 — uint8 input, int8 output, MLIR quantizer

Split decoder output format

Detection (e.g. yolov5n):

  • —boxes — (1, 4, 8400) normalized [0, 1] coordinates
  • —scores — (1, 80, 8400) per-class probabilities

Each tensor has its own quantization scale and zero point. The EdgeFirst HAL handles dequantization and reassembly automatically; no application code change is required across NPU targets.

Embedded metadata

  • —TFLite: edgefirst.json and labels.txt embedded in the ZIP-format model file
  • —ONNX: edgefirst.json embedded in model.metadata_props

No sidecar files required; the model artifact is self-contained.


Limitations

  • —COCO bias — models trained on COCO (80 classes) inherit the dataset's biases (Western-centric scenes, particular object distributions, limited weather/lighting diversity).
  • —Quantization loss — integer quantization introduces accuracy loss relative to FP32: INT8 on the NXP i.MX 8M Plus / i.MX 95 Neutron and Hailo NPUs, and a mixed INT8/INT16 scheme on the NXP Ara240 (the box-regression path is promoted to INT16 for localization accuracy). The magnitude per platform is shown in the Δ vs FP32 column above.
  • —Configurations under active investigation — a subset of INT8 results measure below expectations and are marked ⚠ above; these are tracked for resolution, not accepted as final. The main cases are YOLO11 / YOLO26 on the NXP i.MX 8M Plus VeriSilicon NPU (the most constrained accelerator, where the newer architectures quantize poorly) and some NXP Ara240 segmentation runs. YOLO11 / YOLO26 on the NXP i.MX 95 eIQ Neutron NPU are not yet supported (a delegate limitation) and render without numbers. Each next card snapshot reflects any recovered accuracy.
  • —Input resolution — all models expect 640×640 input; other resolutions require letterboxing.

License

Model weights in this repository are derived from Ultralytics YOLO and remain © Ultralytics Inc., licensed AGPL-3.0 — use requires AGPL-3.0 compliance or an Ultralytics Enterprise License.

The validation results, this model card, and its metadata are Au-Zone Technologies' own contribution, licensed [CC BY-NC 4.0](https://creativecommons.org/licenses/by-nc/4.0/) (Attribution — NonCommercial) — see the repository LICENSE for the full text and citation requirements.


Citation

bibtex
@software{edgefirst_yolov5_det,
  title = { {YOLOv5 Detection — EdgeFirst Model Zoo} },
  author = {Au-Zone Technologies},
  url = {https://huggingface.co/EdgeFirst/yolov5-det},
  year = {2026},
  license = {CC-BY-NC-4.0},
}

<p align="center"> <sub> <a href="https://edgefirst.studio">EdgeFirst Studio</a> · <a href="https://github.com/EdgeFirstAI">GitHub</a> · <a href="https://doc.edgefirst.ai">Docs</a> · <a href="https://www.au-zone.com">Au-Zone Technologies</a><br> Model weights © Ultralytics Inc. (AGPL-3.0) · Validation results &amp; card © 2026 Au-Zone Technologies (CC BY-NC 4.0)<br> NXP<sup>®</sup>, i.MX, eIQ<sup>®</sup>, Neutron, and Ara240 are trademarks or products of NXP Semiconductors. Hailo is a trademark of Hailo Technologies Ltd. Jetson is a trademark of NVIDIA Corporation. All other trademarks are the property of their respective owners. </sub> </p>