hschumann2/TempleOS-Source-Code

1 2                                Memory Overview3 4Paging is practically not used.  64-bit mode requires paging, however, so it is5identity-mapped -- virtual identical to physical.  All tasks on all cores use6the same page table map, just as though all addresses are physical addresses.72Meg or 1Gig page table entries are used.  Nothing swaps to disk.8 9In TempleOS, the lowest 2Gig of memory is called the code heap.  TempleOS's10compiler always uses 32-bit signed relative JMP & CALL insts because 64-bit11CALLs take two insts.  With signed +/- 32-bit values, code can only call a12function within 2Gig distance.  Therefore, TempleOS keeps all code in the lowest132Gig memory addresses including what would normally be called "the kernel".  Two14Gig is plenty for code, don't worry.15 16You can create new, independent heaps using HeapCtrlInit().  Then, use the17CHeapCtrl as the 2nd arg to MAlloc().  See HeapLog() for an example.18 19Memory alloced by a task will be freed when the task is killed.  The Adam Task20is a task that never dies.  His memory is like kernel memory in other operating21systems.  See ACAlloc(), AMAlloc(), AMAllocIdent() and AStrNew().22 23All of the regular page tables are marked, "cached".  When accessing hardware,24however, you need uncached page table.  The lowest 4Gig addresses have an alias25to access hardware located toward the top of mapped space, 0x0100000000.  See26dev.uncached_alias.27 28During an extended powered-on session of TempleOS, in theory, memory will become29fragmented, requiring a reboot.  It has never happens to me.30 31See MemRep() and ::/Demo/MemDemo.HC.32 33 34                           Single System-wide Mem Map35 36 0x0000007C00- 0x0000036BAF37  Kernel module, placed here by the boot-loader, BOOT_RAM_BASE.38 39 0x0000096600- 0x0000096FFF40  Boot block relocated here before loading the Kernel module, BootDVD & BootHD.41 42 0x0000097000- 0x0000097030 Multicore start-up vect code, MPN_VECT.43~0x000009F000- 0x000009FFFF Extended BIOS data area.44 0x00000A0000- 0x00000BFFFF VGA graphics mem with alias at text.vga_alias.45 0x0000100000- 0x0000101FFF CSysFixedArea for misc.46 0x000010C000- 0x002FFFFFFF Code Heap mem.47 48 0x00E0000000- 0x00FFFFFFFF49  32-bit devices could alloc memory at 0xF0000000 going up, but this is wrong,50  since some PCs already have devices at 0xF0000000.  No PCI devices are51  supported, so Mem32DevAlloc() flaws are not an issue.52 53 0x0080000000-~0x00DFFFFFFF54 0x0100000000-~0x00FFFFFFFF55  Data Heap mem.  (The physical memory that exists in this range is data heap.)56 57 0x0100000000- 0x01FFFFFFFF58  Uncached alias of first 4Gig.  (For 32-bit device access.)59 60             - 0x01FFFFFFFF61  64-bit devices are alloced with Mem64DevAlloc() counting bwd, but no PCI62  devices are actually supported.63 64 65 66* Note: There is a break in the data-heap block pool.  This has no effect except67the obvious effect that fragmentation has on contiguous requests.  I can MAlloc(68) an 8Gig chunk on my 12Gig machine.  I can MAlloc() an 32Gig chunk on my 64Gig69machine.70 71* Note: For systems with less than 2Gig RAM, the code and data heap block pools72are the same.  For systems with 2-4Gig of RAM, the code heap is 1/4 of the73total.  See BlkPoolsInit().74 75 76                                    History77 78In 2003, I wanted to make a no-paging ring-0-only 64-bit operating system for79super speed with simplicity and full access.  With paging, every memory request80requires 5 accesses -- it must access the address itself, 4K, 2Meg, 1Gig, and81512Gig page tables, but the CPU's translation look-aside buffer mostly removes82the penalty for using paging.  So, I did not want to use paging, but long mode83requires it.  I did the next best thing -- I identity-mapped everything and84achieved the simplicity I was after with subtle performance boosts, not wasting85time changing address maps.  And, I look forward to the day I command Intel to86make an optimized no-paging long mode.87 88I needed VGA A0000-BFFFF memory to be write-through and 0xE0000000-0xFFFFFFFF to89be uncached for various devices.  All 64-bit computers allow stopping address90translation at 2Meg page size, not using 4K.  I wanted to use 2Meg for91everything because it's faster, with one less level of page tables.  I had to92make A0000-BFFFF write-through, though, so I could not use 2Meg size on the93lowest page.  I did the lowest 2Meg area as 4K pages.  I also unmapped the first944K to cause a fault when dereferencing NULL.95 96In 2016, I came-up with an alternate idea.  I double mapped the lowest memory97with an alias that was uncached.  Accessing the lowest 2Meg area directly was98cached but the alias I created up at the top of address space was uncached.  See99UncachedAliasAlloc().  Unfortunately, I could no longer boast of the simplicity100of identity mapping everything.  Since many of my users are familiar with101A0000-BFFFF, it is actually pretty seriously unfortunate that they cannot use102the easy-to-understand numbers of A0000-BFFFF, but must access the relocated103alias location.  See text.vga_alias.  I also no longer cause a fault when104dereferencing NULL.105 106Then, I switched to 1Gig page sizes.  For the lowest 4Gig, I set-up an alias up107at the top of address space.  See UncachedAliasAlloc().  Not all computers108support 1Gig page tables, however, so I also support 2Meg.109 110My original plan was to allow changing the page tables as needed, so I had code111for taking control of 2Meg pages and marking them uncached or whatever.  When I112did a HDAudio driver, I requested some 32-bit address space as uncached.  Today,113all of the first 4Gig can be accessed without caching at the dev.uncached_alias.114